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1. general description the tea1623p; TEA1623PH is a switched mode power supply (smps) controller ic that operates directly from the recti?ed universal mains. it is implemented in the high voltage ez-hv? soi process, combined with a low voltage bicmos process. the device includes a high voltage power switch and a circuit for start-up directly from the recti?ed mains voltage. a dedicated circuit for valley switching is built in, which makes a very ef?cient slim-line electronic power-plug concept possible. in its most basic version of application, the tea1623p; TEA1623PH acts as a voltage source. here, no additional secondary electronics are required. a combined voltage and current source can be realized with minimum costs for external components. implementation of the tea1623p; TEA1623PH renders an ef?cient and low cost power supply system. 2. features n designed for general purpose supplies n integrated power switch: 6.5 w and 650 v n operates from universal ac mains supplies: 80 v to 276 v n adjustable frequency for ?exible design n rc oscillator for load insensitive regulation loop constant n valley switching for minimum switch-on loss n frequency reduction at low power output for low standby power: <100 mw n adjustable overcurrent protection n undervoltage protection n temperature protection n short winding protection n safe restart mode for system fault conditions n simple application with both primary and secondary (opto) feedback n available in 8-pin and 16-pin dip package. 3. applications tea1623p; TEA1623PH starplug tm rev. 01 17 march 2004 product data sheet n adapters n vcd n set-top box (stb) n cd(r) n dvd n pc silverbox standby smps.
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 2 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 4. quick reference data 5. ordering information table 1: quick reference data symbol parameter conditions min typ max unit v cc(max) maximum supply voltage - - 40 v v drain(max) maximum voltage at pin drain t j >0 c - - 650 v i drain supply current drawn from pin drain no auxiliary supply - 0.5 - ma r dson drain-source on-state resistance i source = - 0.5 a t j =25 c - 6.5 7.5 w t j = 100 c - 9.0 10.0 w f osc oscillator frequency range 10 - 200 khz t amb ambient temperature - 20 - +85 c table 2: ordering information type number package name description version tea1623p dip8 plastic dual in-line package; 8 leads (300 mil) sot97-1 TEA1623PH dip16 plastic dual in-line package; 16 leads (300 mil); long body sot38-1
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 3 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 6. block diagram fig 1. block diagram of tea1623p. col011 protection logic logic supply tea1623p valley power-up reset thermal shutdown oscillator pwm stop low frequency 100 mv 0.75 v 0.5 v blank short winding overcurrent 10x 2.5 v f 1.8 u 1 2 3 4 8 7 6 5 drain n.c. gnd source aux reg rc v cc
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 4 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 7. pinning information 7.1 pinning fig 2. block diagram of TEA1623PH. col013 protection logic logic supply TEA1623PH valley power-up reset thermal shutdown oscillator pwm stop low frequency 100 mv 0.75 v 0.5 v blank short winding overcurrent 10x 2.5 v f 1.8 u 3 4 5 6 14 12 11 drain gnd source aux reg rc v cc 1, 2, 7, 9, 10, 13, 15, 16 n.c. 8 sgnd a. dip8 package. b. dip16 package. fig 3. pin con?guration. tea1623p v cc drain gnd n.c. rc source reg aux 001aaa310 1 2 3 4 6 5 8 7 TEA1623PH n.c. n.c. n.c. n.c. v cc drain gnd n.c. rc source reg aux n.c. n.c. sgnd n.c. 001aaa312 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 5 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 7.2 pin description 8. functional description the tea1623p; TEA1623PH is the heart of a compact ?yback converter, with the ic placed at the primary side. the auxiliary winding of the transformer can be used for indirect feedback to control the isolated output. this additional winding also powers the ic. a more accurate control of the output voltage and/or current can be implemented with an additional secondary sensing circuit and optocoupler feedback. the tea1623p; TEA1623PH uses voltage mode control. the frequency is determined by the maximum transformer demagnetizing time and the time of the oscillator. in the ?rst case, the converter operates in the self oscillating power supply (sops) mode. in the latter case, it operates at a constant frequency, which can be adjusted with external components r rc and c rc . this mode is called pulse width modulation (pwm). furthermore, a primary stroke is started only in a valley of the secondary ringing. this valley switching principle minimizes capacitive switch-on losses. 8.1 start-up and undervoltage lock-out initially, the ic is self supplying from the recti?ed mains voltage. the ic starts switching as soon as the voltage on pin v cc passes the v cc(start) level. the supply is taken over by the auxiliary winding of the transformer as soon as v cc is high enough and the supply from the line is stopped for high ef?ciency operation. as soon as the voltage on pin v cc drops below the v cc(stop) level, the ic stops switching and restarts from the recti?ed mains voltage. 8.2 oscillator the frequency of the oscillator is set by the external resistor and capacitor on pin rc. the external capacitor is charged rapidly to the v rc(max) level and, starting from a new primary stroke, it discharges to the v rc(min) level. because the discharge is exponential, the relative sensitivity of the duty factor to the regulation voltage at low duty factor is almost table 3: pin description symbol pin description tea1623p TEA1623PH v cc 1 3 supply voltage gnd 2 4 ground rc 3 5 frequency setting reg 4 6 regulation input sgnd - 8 signal ground; must preferably be connected to pin gnd aux 5 11 input for voltage from auxiliary winding for timing (demagnetization) source 6 12 source of internal mos switch n.c. 7 1, 2, 7, 9, 10, 13, 15, 16 not connected drain 8 14 drain of internal mos switch; input for start-up current and valley sensing
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 6 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm equal to the sensitivity at high duty factors. this results in a more constant gain over the duty factor range compared to pwm systems with a linear sawtooth oscillator. stable operation at low duty factors is easily realized. for high ef?ciency, the frequency is reduced as soon as the duty factor drops below a certain value. this is accomplished by increasing the oscillator charge time. to ensure that the capacitor can be charged within the charge time, the value of the oscillator capacitor should be limited to approximately 1 nf. 8.3 duty factor control the duty factor is controlled by the internal regulation voltage and the oscillator signal on pin rc. the internal regulation voltage is equal to the external regulation voltage (minus 2.5 v) multiplied by the gain of the error ampli?er (typical 20 db or 10 ). the minimum duty factor of the switched mode power supply is 0 %. the maximum duty factor is set to 75 % (typical value at 100 khz oscillation frequency). 8.4 valley switching a new cycle is started at the primary stroke when the switch is switched on (see figure 4 ). after a certain time (determined by the rc oscillator voltage and the internal regulation level), the switch is turned off and the secondary stroke starts. the internal regulation level is determined by the voltage on pin reg. after the secondary stroke, the drain voltage shows an oscillation with a frequency of approximately where: l p is the primary self inductance on the drain node c p is the parasitic capacitance on the drain node. as soon as the oscillator voltage is high again and the secondary stroke has ended, the circuit waits for a low drain voltage before starting a new primary stroke. the primary stroke starts some time before the actual valley at low ringing frequencies, and some time after the actual valley at high ringing frequencies. figure 5 shows a typical curve for a re?ected voltage n v o of 80 v. this voltage is the output voltage v o (see figure 6 ) transferred to the primary side of the transformer with the factor n (determined by the turns ratio of the transformer). figure 5 shows that the system switches exactly at minimum drain voltage for ringing frequencies of 480 khz, thus reducing the switch-on losses to a minimum. at 200 khz, the next primary stroke is started at 33 before the valley. the switch-on losses are still reduced signi?cantly. 1 2 p l p c p ------------------------------
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 7 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm a: start of new cycle with valley switching. b: start of new cycle in a classical pwm system. fig 4. signals for valley switching. re?ected voltage at n v o =80v. fig 5. typical phase of drain ringing at switch-on. col007 drain valley secondary ringing secondary stroke primary stroke secondary stroke rc oscillator regulation level a b f (khz) 0 800 600 200 400 001aaa311 0 - 20 20 40 phase ( ) - 40
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 8 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 8.5 demagnetization the system operates in discontinuous conduction mode all the time. as long as the secondary stroke has not ended, the oscillator will not start a new primary stroke. during the suppression time t suppr , demagnetization recognition is suppressed. this suppression may be necessary in applications where the transformer has a large leakage inductance and at low output voltages. 8.6 protections 8.6.1 overcurrent protection the cycle-by-cycle peak drain current limit circuit uses the external source resistor r i (see figure 6 ) to measure the current. the circuit is activated after the leading edge blanking time t leb . the protection circuit limits the source voltage to v source(max) , and thus limits the primary peak current. 8.6.2 short winding protection the short winding protection circuit is also activated after the leading edge blanking time. if the source voltage exceeds the short winding protection voltage v swp , the tea1623p; TEA1623PH stops switching. only a power-on reset will restart normal operation. the short winding protection also protects in case of a secondary diode short circuit. 8.6.3 overtemperature protection an accurate temperature protection is provided in the tea1623p; TEA1623PH. when the junction temperature exceeds the thermal shutdown temperature, the ic stops switching. during thermal protection, the ic current is lowered to the start-up current. the ic continues normal operation as soon as the overtemperature situation has disappeared. 8.6.4 overvoltage protection overvoltage protection can be achieved in the application by pulling pin reg above its normal operation level, or by keeping the level of pin aux above v demag . the current primary stroke is terminated immediately, and no new primary stroke is started until the voltage on pin reg drops to its normal operation level. pin reg has an internal clamp. the current feed into pin reg must be limited. 8.7 characteristics of the complete power-plug 8.7.1 input the input voltage range comprises the universal ac mains from 80 v to 276 v. 8.7.2 accuracy the accuracy of the complete converter, functioning as a voltage source with primary sensing, is approximately 8 % (mainly dependent on the transformer coupling). the accuracy with secondary sensing is de?ned by the accuracy of the external components. for safety requirements in case of optocoupler feedback loss, the primary sensing remains active when an overvoltage circuit is connected.
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 9 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 8.7.3 ef?ciency an ef?ciency of 75 % at maximum output power can be achieved for a complete converter designed for universal mains. 8.7.4 ripple a minimum ripple is obtained in a system designed for a maximum duty factor of 50 % under normal operating conditions, and a minimized dead time. the magnitude of the ripple in the output voltage is determined by the frequency and duty factor of the converter, the output current level, and the value and esr of the output capacitor. 9. limiting values [1] pins v cc and rc are not allowed to be current driven. [2] pins reg and aux are not allowed to be voltage driven. [3] human body model: equivalent to discharging a 100 pf capacitor through a 1.5 k w series resistor. table 4: limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit voltages v cc supply voltage continuous [1] - 0.4 +40 v v rc oscillator input voltage [1] - 0.4 +3 v v source dmos power transistor source voltage - 0.4 +5 v v drain dmos power transistor drain voltage - 0.4 +650 v currents i reg regulation input current [2] -6ma i aux auxiliary winding input current [2] - 10 +5 ma i rc oscillator capacitor charge current - 3- ma i source source current - 2+2a i drain drain current - 2+2a general p tot total power dissipation tea1623p t amb <45 c - 1.0 w TEA1623PH t amb <50 c - 1.7 w t stg storage temperature - 55 +150 c t amb ambient temperature - 20 +85 c t j junction temperature - 20 +145 c v esd electrostatic discharge voltage human body model [3] pin drain - 1500 +1500 v all other pins - 2000 +2000 v machine model [4] all pins - 200 +200 v
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 10 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm [4] machine model: equivalent to discharging a 200 pf capacitor through a 0.75 m h coil and a 10 w series resistor. 10. thermal characteristics [1] thermal resistance r th(j-a) can be lower when pin gnd is connected to suf?cient copper area on the printed-circuit board. see the tea152x application notes for details. 11. characteristics table 5: thermal characteristics symbol parameter conditions typ unit r th(j-a) thermal resistance from junction to ambient in free air [1] tea1623p 100 k/w TEA1623PH 55 k/w table 6: characteristics t amb =25 c; no overtemperature; all voltages are measured with respect to ground; currents are positive when ?owing into the ic; unless otherwise speci?ed. symbol parameter conditions min typ max unit supplies supply on pin v cc v cc(start) start voltage 9 9.5 10 v v cc(stop) stop voltage undervoltage lock-out 7.0 7.5 8.0 v i cc(operate) operating supply current normal operation - 1.3 1.9 ma i cc(startup) start-up supply current start-up - 180 400 m a i cc(ch) charging current v drain >60v v cc =0v - 650 - 520 - 390 m a v cc = 8.5 v - 375 - 275 - 175 m a supply on pin drain i drain supply current drawn from pin drain no auxiliary supply - 0.5 - ma with auxiliary supply; v drain >60v - 30 125 m a pulse width modulator mode d min minimum duty factor - 0 - % d max maximum duty factor f osc = 100 khz - 75 - % self oscillating power supply mode v demag demagnetization recognition voltage level 50 100 150 mv t suppr time of suppression of transformer ringing at start of secondary stroke 1.0 1.5 2.0 m s oscillator: pin rc v rc(min) minimum voltage of rc oscillator setting 60 75 90 mv v rc(max) maximum voltage of rc oscillator setting 2.4 2.5 2.6 v
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 11 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm t rc(ch) rc charging time - 1 - m s f osc oscillator frequency range 10 - 200 khz duty factor regulator: pin reg v reg input voltage on pin reg 2.4 2.5 2.6 v g v(erroramp) voltage gain of error ampli?er - 20 - db v reg(clamp) clamping voltage on pin reg i reg = 6 ma - - 7.5 v valley switching recognition dv/dt valley valley recognition - 102 - +102 v/ m s f valley ringing frequency for valley switching n v o = 100 v 200 550 800 khz t d(valley-on) delay from valley recognition to switch-on - 150 - ns output stage (fet) i l(drain) drain leakage current v drain = 650 v - - 125 m a v br(drain) drain breakdown voltage t j >0 c 650 - - v r dson drain-source on-state resistance i source = - 0.5 a t j =25 c - 6.5 7.5 w t j = 100 c - 9.0 10.0 w t drain(f) drain fall time v drain(switch_on) = 300 v; no external capacitor at pin drain -75-ns temperature protection t prot(max) maximum threshold temperature 150 160 170 c t prot(hys) threshold temperature hysteresis - 2 - c overcurrent and short winding protection: pin source v source(max) overcurrent protection voltage dv/dt = 0.1 v/ m s 0.47 0.50 0.53 v v swp short winding protection voltage dv/dt = 0.5 v/ m s 0.7 0.75 0.8 v t d(propagation) delay from detecting v source(max) to switch-off dv/dt = 0.5 v/ m s - 160 185 ns t leb leading edge blanking time both overcurrent and short winding protection 250 350 450 ns table 6: characteristics continued t amb =25 c; no overtemperature; all voltages are measured with respect to ground; currents are positive when ?owing into the ic; unless otherwise speci?ed. symbol parameter conditions min typ max unit
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 12 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 12. application information 13. test information 13.1 quality information the general quality speci?cation for integrated circuits, snw-fq-611 is applicable. further application information can be found in the tea152x application notes. fig 6. application with primary sensing for tea1623p. col012 1 2 3 4 8 7 6 5 tea1623p drain n.c. gnd source aux r4 r3 r2 r1 d2 c6 - ycap d1 d5 z1 c5 cf2 lf cf1 mains v o r aux r i reg rc r rc c rc c vcc v cc
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 13 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 14. package outline fig 7. package outline dip8. references outline version european projection issue date iec jedec jeita sot97-1 99-12-27 03-02-13 unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.73 1.14 0.53 0.38 0.36 0.23 9.8 9.2 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 1.15 4.2 0.51 3.2 inches 0.068 0.045 0.021 0.015 0.014 0.009 1.07 0.89 0.042 0.035 0.39 0.36 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.045 0.17 0.02 0.13 b 2 050g01 mo-001 sc-504-8 m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 8 1 5 4 b e 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. pin 1 index dip8: plastic dual in-line package; 8 leads (300 mil) sot97-1
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 14 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm fig 8. package outline dip16. unit a max. 1 2 b 1 cee m h l references outline version european projection issue date iec jedec jeita mm inches dimensions (inch dimensions are derived from the original mm dimensions) sot38-1 99-12-27 03-02-13 a min. a max. b max. w m e e 1 1.40 1.14 0.055 0.045 0.53 0.38 0.32 0.23 21.8 21.4 0.86 0.84 6.48 6.20 0.26 0.24 3.9 3.4 0.15 0.13 0.254 2.54 7.62 0.3 8.25 7.80 0.32 0.31 9.5 8.3 0.37 0.33 2.2 0.087 4.7 0.51 3.7 0.15 0.021 0.015 0.013 0.009 0.01 0.1 0.02 0.19 050g09 mo-001 sc-503-16 m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 16 1 9 8 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. (1) (1) d (1) z dip16: plastic dual in-line package; 16 leads (300 mil); long body sot38-1
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 15 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 15. soldering 15.1 introduction to soldering through-hole mount packages this text gives a brief insight to wave, dip and manual soldering. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). wave soldering is the preferred method for mounting of through-hole mount ic packages on a printed-circuit board. 15.2 soldering by dipping or by solder wave driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the speci?ed maximum storage temperature (t stg(max) ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 15.3 manual soldering apply the soldering iron (24 v or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 and 400 c, contact may be up to 5 seconds. 15.4 package related soldering information [1] for sdip packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. [2] for pmfp packages hot bar soldering or manual soldering is suitable. table 7: suitability of through-hole mount ic packages for dipping and wave soldering methods package soldering method dipping wave dbs, dip, hdip, rdbs, sdip, sil suitable suitable [1] pmfp [2] - not suitable
9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 16 of 18 philips semiconductors tea1623p; TEA1623PH starplug tm 16. revision history table 8: revision history document id release date data sheet status change notice order number supersedes tea1623p_TEA1623PH_1 20040317 product data - 9397 750 12579 -
philips semiconductors tea1623p; TEA1623PH starplug tm 9397 750 12579 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 01 17 march 2004 17 of 18 17. data sheet status [1] please consult the most recently issued data sheet before initiating or completing a design. [2] the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the l atest information is available on the internet at url http://www.semiconductors.philips.com. [3] for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 18. de?nitions short-form speci?cation the data in a short-form speci?cation is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values de?nition limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. 19. disclaimers life support these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change noti?cation (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speci?ed. 20. trademarks starplug is a trademark of koninklijke philips electronics n.v. ez-hv is a trademark of koninklijke philips electronics n.v. 21. contact information for additional information, please visit: http://www.semiconductors.philips.com for sales of?ce addresses, send an email to: sales.addresses@www.semiconductors.philips.com level data sheet status [1] product status [2] [3] de?nition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn).
? koninklijke philips electronics n.v. 2004 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. date of release: 17 march 2004 document order number: 9397 750 12579 published in the netherlands philips semiconductors tea1623p; TEA1623PH starplug tm 22. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 functional description . . . . . . . . . . . . . . . . . . . 5 8.1 start-up and undervoltage lock-out . . . . . . . . . 5 8.2 oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.3 duty factor control. . . . . . . . . . . . . . . . . . . . . . . 6 8.4 valley switching. . . . . . . . . . . . . . . . . . . . . . . . . 6 8.5 demagnetization. . . . . . . . . . . . . . . . . . . . . . . . 8 8.6 protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8.6.1 overcurrent protection . . . . . . . . . . . . . . . . . . . 8 8.6.2 short winding protection . . . . . . . . . . . . . . . . . . 8 8.6.3 overtemperature protection . . . . . . . . . . . . . . . 8 8.6.4 overvoltage protection . . . . . . . . . . . . . . . . . . . 8 8.7 characteristics of the complete power-plug . . . 8 8.7.1 input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8.7.2 accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8.7.3 ef?ciency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.7.4 ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9 10 thermal characteristics. . . . . . . . . . . . . . . . . . 10 11 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 10 12 application information. . . . . . . . . . . . . . . . . . 12 13 test information . . . . . . . . . . . . . . . . . . . . . . . . 12 13.1 quality information . . . . . . . . . . . . . . . . . . . . . 12 14 package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 15 soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15.1 introduction to soldering through-hole mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15.2 soldering by dipping or by solder wave . . . . . 15 15.3 manual soldering . . . . . . . . . . . . . . . . . . . . . . 15 15.4 package related soldering information . . . . . . 15 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 17 data sheet status . . . . . . . . . . . . . . . . . . . . . . . 17 18 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 19 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 20 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 21 contact information . . . . . . . . . . . . . . . . . . . . 17

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